Prof. Jung's paper, “Dual-input Stacked Inverter-based Single-ended DRAM Sense Amplifier Using BL Switches for Low-power High-speed Sensing”, has been published in IEEE Journal of Solid-State Circuits (JSSC), one of the most highly-ranked journals in circuit design field (Impact Factor 4.6).

The proposed BLSA enables high-speed sensing operation in low VDD using a dual-input stacked inverter, which significantly improves power efficiency compared to previous BLSAs.

This work was led by Sehee Lim (Ph.D. Candidate) and Prof. Seong-Ook Jung of the VLSI system laboratory