Sehyeon Kim (2nd-year MS/PhD student) gave a presentation at the IEEE International Symposium on High-Performance Computer Architecture (HPCA), held in Sydney, Australia, in Feb. 2026. His work introduced a machine-learning-based technique for predicting and evaluating the architectural performance, power consumption, and design area of hardware neural accelerators.

This research was conducted by Sehyeon Kim (1st author), William Song (corr. author), Chanho Park, and Minkwan Kim (co-authors). HPCA is a top-tier computer architecture conference.