< BK21+ BEST Seminar Series Announcement> 

Time and Date : 16:00 ~ 17:00 Wednesday 10/31/2018

Place : C616, Engineering Building #3

Title : Beyond Si CMOS with ultra-low power consumption

Abstract:

Computing capacity has made a dramatic progress over the past five decades since the solid state transistor was first introduced by Bell labs in 1948. It stems from size miniaturization, technological revolution in nano fabrication process and controlling charge transport in Si semiconductor, and the success of von Neumann computing architecture. The transistor size scalability governed by Moore’s law has led to a reduction in costs, shrinking of the circuit area, lowering of the supply voltage. Continued scaling of Si complementary metal-oxide-semiconductor (CMOS) is currently approaching of a characteristic size of 10 nm and expected to encounter its fundamental limit. Power consumption and speed are limited fundamentally by the devices, but practically by the electrical parasites, interconnects and chip architecture.

In order to make significant improvements in the energy efficiency and speed of integrated circuits in the future, it will require the introduction of non-traditional materials and structures, as well as beyond-CMOS logic devices that are based on quantum nanoelectronic or nanomagnetic principles. In particular, computing with spintronics is emerging as a leading candidate for memory and logic. Control of the spin degree of freedom of an electron has brought high performance, low power consumption and multiple functionality. They offer zero quiescent power and yet combine novel functions such as programmable logic operation and non-volatile built-in memory.

In the talk, I will briefly introduce the background of spintronics followed by logic devices based on spin field effect transistor and magnetic field controlled spin logic gates built on InSb p-n junctions. Non-volatile spin transfer torque (STT) memory will be presented for further power reduction for future information storage.

Presenter: Joonyeon Chang, Principal Research Scientist, Director-General of the Institute / Post-Si Semiconductor Institute (PSI), Korea Institute of Science and Technology (KIST)

Host: Prof. Jung, Seong Ook, Yonsei EEE