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Research & Laboratory

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세미나 [05/16] Tackling the end of scaling in semiconductors through new technologies: 3-dimensional integrated circuits ..
작성일
2019.04.24
작성자
전기전자공학부
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< BK21 플러스 BEST 정보기술 사업단 세미나 개최 안내 > 


개최일시 : 2019년 5월 16일 (목) 11:00 ~ 12:00

개최장소 : 제 3공학관 C616호

세미나 제목 : Tackling the end of scaling in semiconductors through new technologies: 3-dimensional integrated circuits and gate-all-around FETs

내용 :

The industry is worrying that the everlasting trend of Moore’s law in transistor scaling is “finally” reaching to an end in a very near future. This unfortunate forecast is asking the industry to devise a reasonable breakthrough so that the continued improvement in semiconductor systems could continue its momentum despite the unwanted news we are facing these days. In this talk, we will discuss some promising technologies that are considered as a breakthrough to the anticipation of “end of scaling.” 3-dimensional integrated circuits (3D ICs) is a technology that stacks dies on the top of each other by using vertical interconnect technology such as through-silicon vias (TSVs) and monolithic inter-tier vias (MIVs). In this talk, we will discuss one important theme in 3D ICs that is very critical to IC design: low-power 3D ICs. Another key technology that is considered as a breakthrough is a new device technology called gate-all-around FETs. We will discuss what are the impacts the VLSI industry when these new devices are introduced to designs.



강연자 성함&직함 / 소속 : 송대건 조교수 / 경북대학교 IT대학 전자공학부

초청자 : 전기전자공학과 교수 강성호